1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495 |
- (kicad_pcb (version 4) (host pcbnew 4.0.7)
- (general
- (links 0)
- (no_connects 0)
- (area 0 0 0 0)
- (thickness 1.6)
- (drawings 0)
- (tracks 0)
- (zones 0)
- (modules 0)
- (nets 1)
- )
- (page USLetter)
- (layers
- (0 F.Cu signal)
- (31 B.Cu signal)
- (36 B.SilkS user)
- (37 F.SilkS user)
- (38 B.Mask user)
- (39 F.Mask user)
- (41 Cmts.User user)
- (44 Edge.Cuts user)
- (45 Margin user)
- (46 B.CrtYd user)
- (47 F.CrtYd user)
- )
- (setup
- (last_trace_width 0.1524)
- (trace_clearance 0.0508)
- (zone_clearance 0.508)
- (zone_45_only no)
- (trace_min 0.1524)
- (segment_width 0.2)
- (edge_width 0.15)
- (via_size 0.508)
- (via_drill 0.254)
- (via_min_size 0.508)
- (via_min_drill 0.254)
- (uvia_size 0.508)
- (uvia_drill 0.254)
- (uvias_allowed no)
- (uvia_min_size 0)
- (uvia_min_drill 0)
- (pcb_text_width 0.3)
- (pcb_text_size 1.5 1.5)
- (mod_edge_width 0.15)
- (mod_text_size 1 1)
- (mod_text_width 0.15)
- (pad_size 1.524 1.524)
- (pad_drill 0.762)
- (pad_to_mask_clearance 0.0508)
- (aux_axis_origin 0 0)
- (visible_elements FFFFFF7F)
- (pcbplotparams
- (layerselection 0x00030_80000001)
- (usegerberextensions false)
- (excludeedgelayer true)
- (linewidth 0.100000)
- (plotframeref false)
- (viasonmask false)
- (mode 1)
- (useauxorigin false)
- (hpglpennumber 1)
- (hpglpenspeed 20)
- (hpglpendiameter 15)
- (hpglpenoverlay 2)
- (psnegative false)
- (psa4output false)
- (plotreference true)
- (plotvalue true)
- (plotinvisibletext false)
- (padsonsilk false)
- (subtractmaskfromsilk false)
- (outputformat 1)
- (mirror false)
- (drillshape 1)
- (scaleselection 1)
- (outputdirectory ""))
- )
- (net 0 "")
- (net_class Default "This is the default net class."
- (clearance 0.0508)
- (trace_width 0.1524)
- (via_dia 0.508)
- (via_drill 0.254)
- (uvia_dia 0.508)
- (uvia_drill 0.254)
- )
- )
|